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Freescale Semiconductor /MKL28T7_CORE1 /SEMA420 /GATE11

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Interpret as GATE11

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7 43 0 0 00 0 0 0 0 0 0 0 0 (0000)GTFSM

GTFSM=0000

Description

Gate Register

Fields

GTFSM

Gate Finite State Machine.

0 (0000): The gate is unlocked (free).

1 (0001): The gate has been locked by processor 0.

2 (0010): The gate has been locked by processor 1.

3 (0011): The gate has been locked by processor 2.

4 (0100): The gate has been locked by processor 3.

5 (0101): The gate has been locked by processor 4.

6 (0110): The gate has been locked by processor 5.

7 (0111): The gate has been locked by processor 6.

8 (1000): The gate has been locked by processor 7.

9 (1001): The gate has been locked by processor 8.

10 (1010): The gate has been locked by processor 9.

11 (1011): The gate has been locked by processor 10.

12 (1100): The gate has been locked by processor 11.

13 (1101): The gate has been locked by processor 12.

14 (1110): The gate has been locked by processor 13.

15 (1111): The gate has been locked by processor 14.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data